The present invention relates to semiconductor devices such as MOSFET""s (insulated gate field effect transistors), IGBT""s (insulated gate bipolar transistors), bipolar transistors and diodes having a vertical semiconductor structure including an alternating conductivity type layer that provides a current path in the ON state of the devices and is depleted in the OFF state of the devices.
A semiconductor device may be roughly classified as a lateral semiconductor device that arranges its electrodes on a major surface or a vertical semiconductor device that distributes its electrodes on both major surfaces facing opposite to each other. When the vertical semiconductor device is ON, a drift current flows in the thickness direction of the semiconductor chip (vertical direction). When the vertical semiconductor device is OFF, the depletion layers caused by application of a reverse bias voltage expands in the vertical direction. In order to provide a vertical semiconductor device with a high breakdown voltage, in that the current flows between the opposite-facing electrodes on the major surfaces, it is necessary to increase the specific resistance of the highly resistive layer between the opposite-facing electrodes and to thicken the highly resistive layer.
FIG. 10 shows a perspective cross sectional view of a conventional vertical MOSFET as an example of a power device. Referring now to FIG. 10, the vertical MOSFET includes a highly resistive n-type drift layer 2, p-type well regions 3 in the surface portion of n-type drift layer 2, and n+-type source regions 4 in p-type well regions 3. Trenches 9 are dug from the surfaces of n+-type source regions 4 down to n-type drift layer 2. A gate electrode 6 is buried in trench 9 with a gate insulation film 5 interposed therebetween. A source electrode contacts with p-type well regions 3 and n+-type source regions 4. A drain electrode contacts with a drain layer 1.
In the vertical semiconductor device as shown in FIG. 10, highly resistive n-type drift layer 2 works as a region for making a drift current flow vertically when the MOSFET is in the ON-state. In the OFF-state of the MOSFET, depletion layers expand from the pn-junctions between p-type well regions 3 and n-type drift layer 2 into n-type drift layer 2, resulting in a high breakdown voltage of the MOSFET. Thinning highly resistive n-type drift layer 2 (shortening the current path in highly resistive n-type drift layer 2) is effective for substantially reducing the on-resistance (resistance between the drain and the source) of the MOSFET, since the drift resistance is lowered in the ON-state of the device. However, the short current path in n-type drift layer 2 causes breakdown at a low voltage and the breakdown voltage (the voltage between the source and the drain) is lowered, since the expansion widths of the depletion layers expanding from the pn-junctions between p-type well regions 3 and n-type drift layer 2 are narrowed and the electric field strength in the depletion layers soon reaches the maximum (critical) value for silicon. However, in the semiconductor device with a high breakdown voltage, a thick n-type drift layer 2 inevitably causes high on-resistance and loss increase. In short, there exists a tradeoff relation between the on-resistance (current capacity) and the breakdown voltage of the MOSFET. The breakdown voltage is sustained by the depletion layers expanding from the pn-junctions between p-type well regions 3 and n-type drift layer 2. The breakdown voltage increases as the impurity concentration in n-type drift layer 2 is lower and n-type drift layer 2 is thicker.
The on-resistance RONA and the breakdown voltage VB of the vertical MOSFET are related with each other by the following relational expression (1) (cf. Hu. C., Rec. Power Electronics Specialists Conf., San Diego, (1979), p 385).
RONA=(27/8)(VB2/xcexc∈EC3)xe2x80x83xe2x80x83(1)
Here, xcexc is electron mobility, ∈ is dielectric permeability of a semiconductor, and EC a maximum electric filed strength. The on-resistance RONA is proportional to the square of the breakdown voltage VB and increases quickly with increase of the breakdown voltage VB.
Increase of the on-resistance with increase of the breakdown voltage poses a serious problem not only on the MOSFET""s but also on the power devices, including a drift layer and exhibiting a high breakdown voltage, such as IGBT""s, bipolar transistors and diodes. Recently, a new junction structure has been proposed to obviate the problem described above (cf. G. Deboy et al., xe2x80x9cA new generation of high voltage MOSFETs breaks the limit line of siliconxe2x80x9d, Technical digest of IEDM ""98 (1998), pp. 683-685, European Patent 0 053 854, U.S. Pat. No. 5,216,275, U.S. Pat. No. 5,438,215, and Japanese Unexamined Laid Open Patent Application H09(1997)-266311). The proposed semiconductor devices include an alternating conductivity type drift layer formed of heavily doped n-type regions and p-type regions alternately laminated with each other. The alternating conductivity type drift layer provides a current path in the ON-state of the device and is depleted to bear the breakdown voltage in the OFF-state of the device.
Hereinafter, the semiconductor device including an alternating conductivity type drift layer will be referred to as the xe2x80x9csemiconductor device with a super-junction structurexe2x80x9d or as the xe2x80x9csuper-junction semiconductor devicexe2x80x9d.
FIG. 11 is a perspective cross sectional view of a vertical MOSFET having a super-junction structure. Referring now to FIG. 11, the vertical MOSFET of FIG. 11 is different from the vertical MOSFET of FIG. 10 in that the vertical MOSFET of FIG. 11 includes a drift layer 12, that is not a single-layered one but formed of n-type drift regions 12a and p-type partition regions 12b alternately laminated with each other. In the figure, p-type well regions 13, n+-type source regions 14, gate insulation films 15, and gate electrodes 16 are shown. A source electrode contacts with p-type well regions 13 and n+-type source regions 14. A drain electrode contacts with a drain layer 11.
In the structure shown in FIG. 11, the on-resistance RONA and the breakdown voltage VB of the vertical MOSFET are related with each other by the following relational expression (2) (cf. T. Fujihira xe2x80x9cTheory of Semiconductor Superjunction Devicesxe2x80x9d Jpn. J. Appl. Phys. Vol. 36 (1997), pp. 6254-6262).
RONA=4d(VB/xcexcEC2)xe2x80x83xe2x80x83(2)
Here, d is the width of n-type drift region 12a. 
As the relational expression (2) indicates, the on-resistance RONA of the super-junction semiconductor device increases in proportion to the breakdown voltage VB and more slowly than in the conventional semiconductor structure, the on-resistance RONA thereof is related with the breakdown voltage VB by the relational expression (1).
FIG. 12 is a graph relating the breakdown voltage and the on-resistance for the super-junction semiconductor devices. In the figure, the horizontal axis represents the breakdown voltage VB and the vertical axis the on-resistance RONA.
The ▴ marks represent the simulated values for the super-junction semiconductor device including n-type drift regions 12a of 50 nm in width, the xe2x97xaf marks the simulated values for the super-junction semiconductor device including n-type drift regions 12a of 500 nm in width, and the ▪ marks the simulated values for the super-junction semiconductor device including n-type drift regions 12a of 5 xcexcm in width. For the sake of comparison, the relation between the breakdown voltage and the on-resistance of the conventional semiconductor device including a single-layered drift layer is described by a broken line in FIG. 12.
For example, the on-resistance of the super-junction semiconductor device exhibiting the breakdown voltage of 1000 V and including n-type drift regions 12a, each 5 xcexcm in width, 60 xcexcm in thickness, and the impurity concentration therein is 5xc3x971015 cmxe2x88x923, is less than one tenth as large as that of the conventional semiconductor device.
Drift layer 12 is formed in the following way. At first, a highly resistive n-type layer is grown epitaxially on an n+-type drain layer 11. The n-type drift regions 12a are formed by etching the highly resistive n-type layer to form trenches down to n+-type drain layer 11. Then, p-type partition regions 12b are formed by epitaxially growing p-type layers in the trenches.
In the conventional power devices, a breakdown withstanding structure for sustaining the breakdown voltage such as a guard ring and a field plate is usually formed in the peripheral portion of the semiconductor device.
FIG. 13(a) is a cross sectional view of the semiconductor device including a guard ring. FIG. 13(b) is a cross sectional view of the semiconductor device including a field plate. In these figures, the edge of the depletion layer expanded by a voltage applied from a power supply in the left hand side of the figures is shown by a broken curve.
The breakdown withstanding structure facilitates expanding the depletion layer, preventing the electric field from localizing to the surface of the semiconductor device and raising the breakdown voltage to an ideal value, that the pn-junctions can provide.
The foregoing patent specifications and reports describe the active portion, through that a main current flows, of the alternating conductivity type drift layer. However, the foregoing patent specifications and reports do not describe anything on the breakdown withstanding structure, that is usually formed to realize a high breakdown voltage.
The semiconductor device, that includes an alternating conductivity type drift layer but lacks any breakdown withstanding structure, fails to realize a high breakdown voltage. Moreover, since the fundamental junction structure in the super-junction semiconductor device is different from the conventional junction structure, the conventional guard ring structure and the conventional field plate structure are not applicable, without modification, to the super-junction semiconductor device.
In view of the foregoing, it is an object of the invention to provide a super-junction semiconductor device that facilitates preventing the electric field from localizing and realizing a high breakdown voltage.
According to an aspect of the invention, there is provided a super-junction semiconductor device including: a semiconductor chip having a first major surface and a second major surface facing opposite to the first major surface, the semiconductor chip including an active region and a peripheral region surrounding the active region; a first main electrode and a second main electrode on the first major surface on the active region; a third main electrode on the second major surface; a layer with low electrical resistance extending on the side of the second major surface from the active region to the peripheral region; a first alternating conductivity type layer on the layer with low electrical resistance in the active region, the first alternating conductivity type layer providing a current path in the ON-state of the semiconductor device and being depleted in the OFF-state of the semiconductor device, the first alternating conductivity type layer being formed of drift regions of a first conductivity type and partition regions of a second conductivity type, the drift regions and the partition regions being laminated alternately with each other; and a second alternating conductivity type layer on the layer with low electrical resistance in the peripheral region, the second alternating conductivity type layer being formed of drift regions of the first conductivity type and partition regions of the second conductivity type, the drift regions and the partition regions being laminated alternately with each other. Advantageously, the drift regions and the partition regions in the first alternating conductivity type layer and the drift regions and the partition regions in the second alternating conductivity type layer extend in perpendicular to the first major surface.
Advantageously, the first alternating conductivity type layer and the second alternating conductivity type layer are continuous to each other.
Since depletion layers expand from multiple pn-junctions into the drift regions and the partition regions, resulting in depletion of not only the outer region but also the second major surface side region due to the arrangement of the second alternating conductivity type layer around the active region, the breakdown voltage of the peripheral region of the semiconductor device is improved.
Advantageously, the impurity concentrations in the drift regions and the partition regions in the second alternating conductivity type layer are equal to the respective net impurity concentrations in the drift regions and the partition regions in the first alternating conductivity type layer. Advantageously, the drift regions and the partition regions in the second alternating conductivity type layer and the drift regions and the partition regions in the first alternating conductivity type layer are shaped with respective planar stripes extending in parallel to each other. Advantageously, the widths of the drift regions and the partition regions in the second alternating conductivity type layer are almost equal to the respective widths of the drift regions and the partition regions in the first alternating conductivity type layer.
The curved electric line of force extending from the side portion of the active region to the layer with low electric resistance on the side of the second major surface via the peripheral region is longer than the straight electric line of force extending from the first major surface side of the active region to the layer with low electric resistance on the side of the second major surface via the first alternating conductivity type layer. Since the depletion electric field strength is lower in the second alternating conductivity type layer than in the first alternating conductivity type layer in the active region even when the impurity concentrations in the drift regions and the partition regions in the second alternating conductivity type layer are equal to the respective impurity concentrations in the drift regions and the partition regions in the first alternating conductivity type layer due to the longer electric line of force in the peripheral region, the breakdown voltage is higher in the peripheral region than in the active region. Since a certain high breakdown voltage is guaranteed for the peripheral region of the super-junction semiconductor device including a first alternating conductivity type layer formed of alternately laminated n-type drift regions and p-type partition regions extending vertically, the structure of the first alternating conductivity type layer is optimized easily, the freedom for designing super-junction semiconductor devices is increased and practical super-junction semiconductor devices are developed.
Preferably, the impurity amounts in the second alternating conductivity type layer in the peripheral region are smaller than the impurity amounts in the first alternating conductivity type layer in the active region. Since the second alternating conductivity type layer in the peripheral region is depleted more easily than the first alternating conductivity type layer in the active region due to the impurity distribution described above, the breakdown voltage is surely higher in the peripheral region than in the active region.
Advantageously, the drift regions in the first alternating conductivity type layer and in the second alternating conductivity type layer or the partition regions in the first alternating conductivity type layer and in the second alternating conductivity type layer are located at the lattice points of a planar polygonal lattice such as a triangular lattice, a rectangular lattice and a hexagonal lattice. The arrangements described above make it easier to form the first alternating conductivity type layer and the second alternating conductivity type layer.
Advantageously, the super-junction semiconductor device further includes an insulation film covering at least a part of the second alternating conductivity type layer. Advantageously, the super-junction semiconductor device further includes an insulation film covering the adjacent portion of the second alternating conductivity type layer adjacent to the first alternating conductivity type layer, the insulation film being covered by the second main electrode. Advantageously, the super-junction semiconductor device further includes one or more insulation films on the second alternating conductivity type layer and one or more field plate electrodes on the one or more insulation films. Advantageously, the one or more field plate electrodes are in contact with the respective one or more partition regions in the second alternating conductivity type layer. Advantageously, the one or more field plate electrodes are extended over one or more drift regions in the second alternating conductivity type layer. Advantageously, the potential of each of the one or more field plate electrodes is floated.
By biasing each of the one or more field plate electrodes at an appropriate potential, depletion layers expand into the drift regions below the field plate electrodes when a voltage is applied, electric field is prevented from localizing around the electrode edge in the active region, and the surface electric field is relaxed.
Advantageously, the super-junction semiconductor device further includes a resistive film between the adjacent field plate electrodes. Advantageously, the super-junction semiconductor device further includes an insulation film on the second alternating conductivity type layer and a resistive film on the insulation film.
By connecting two field plate electrodes with a resistive film, the potentials of the field plate electrodes are fixed. The resistive film formed above the second alternating conductivity type layer with the insulation film interposed therebetween facilitates providing a uniform potential distribution throughout the second alternating conductivity type layer.
Advantageously, the super-junction semiconductor device further includes a channel stopper region of the first conductivity type in the outer portion of the peripheral region. Advantageously, the super-junction semiconductor device further includes a channel stopper region of the first conductivity type, the channel stopper region extending in perpendicular to the stripes of the drift regions and the partition regions in the first alternating conductivity type layer and in the second alternating conductivity type layer. Advantageously, the channel stopper region is extended deeply enough to reach the layer with low electrical resistance. Advantageously, the channel stopper region and the partition regions form pn-junctions therebetween. Advantageously, one or more of the partition regions are surrounded by the channel stopper region and the drift regions in a cross section parallel to the first major surface. Advantageously, the impurity concentration in the channel stopper region is equal to or lower than the impurity concentration in the drift regions.
If the side face of the alternating conductivity type layer is left untreated after being cut by dicing, a leakage current will flow from the as cut face to the source electrode via the partition regions, causing leakage current increase. The channel stopper region of the first conductivity type prevents the leakage current from increasing. The arrangement of the multiple channel stopper regions facilitates providing the semiconductor device with a high breakdown voltage more securely.